|
4th
Workshop
on
Dependable and
Secure Nanocomputing
Monday June 28, 2010 — Chicago,
IL, USA
|
Organizers: |
•
Jean Arlat, LAAS-CNRS, Université de
Toulouse, France
• Cristian
Constantinescu, AMD, Fort Collins, CO, USA
• Ravishankar
K. Iyer, UIUC, Urbana, USA
• Johan Karlsson, Chalmers University of Technology, Göteborg,
Sweden
• Michael
Nicolaïdis, TIMA, Université de Grenoble, France |
Schedule
|
Contributions |
Slides |
08:30-10:00
SESSION
1
Opening
and
Special Focus |
Moderator: Cristian Constantinescu |
(To be
posted after the Workshop) |
Introduction
to the Workshop
Jean Arlat and Johan Karlsson |
|
Massive
Statistical Process Variations: A Grand Challenge for Testing Nanoelectronic
Circuits Bernd
Becker*, Sybille Hellebrand**, Ilia Polian***, Bernd Straube & Wolfgang
Vermeiren****, Hans-Joachim Wunderlich*****
* University of Freiburg,
** University of Paderborn, *** University of Passau, **** Fraunhofer IIS/EAS
Dresden, ***** University of Stuttgart; Germany
|
|
10:00-10:30 |
Coffee
Break |
|
10:30-12:00
SESSION
2
Soft
Errors
and
Intermittent Faults
|
Moderator:
Alan Wood, Sun Microsystems, Santa Clara, CA, USA |
|
Towards
Understanding the Effects of Intermittent Hardware Faults on Programs
Layali
Rashid, Karthik Pattabiraman, Sathish Gopalakrishnan, The University
of British Columbia, Canada |
|
Gate
Input Reconfiguration for Combating Soft Errors in Combinational
Circuits
Warin
Sootkaneung, Kewal K. Saluja, University of Wisconsin-Madison, USA
|
|
Verification
of Soft Error Detection Mechanism through Fault Injection on Hardware
Emulation Platform
Oscar Ballan*, Umberto Rossi*, Anne Wantens**, Jean-Marc
Daveau***, Salvatore Nappi****, Philippe Roche***
STMicrolectronics * Agrate Brianza, Italy, ** Grenoble, France,
*** Crolles, France, **** Arzano, Italy |
|
12:00-13:30 |
Lunch |
|
13:30-15:00
SESSION
3
Fault-Tolerant
Architectures
and
Resilience
|
Moderator:
Helia Naeimi, Intel Corporation, Santa Clara, CA, USA
|
|
Pair
and Swap: An Approach to Graceful Degradation for Dependable Chip
Multiprocessors
Masashi Imai, Tomohide Nagai, The University of Tokyo; Takashi
Nanya, Canon Inc., Tokyo; Japan |
|
Implementation of
Self-Healing Asynchronous Circuits at the Example of a Video-Processing
Algorithm
Thomas Panhofer, Werner Friesenbichler, Andreas Steininger, Vienna
University of Technology, Austria |
|
Fault-Tolerant
Communication in 3D Integrated Systems
Vladimir Pasca, Lorena Anghel, Mounir Benabdenbi, TIMA Laboratory,
Grenoble, France |
|
15:00-15:30 |
Coffee
Break |
|
15:30-17:30
SESSION
4
Robustness
Enhancement & Trust Management
and
Closing
|
Moderator:
Takashi Nanya, Canon Inc., Tokyo, Japan
|
|
Towards
Self-Timed Logic in the Time-Triggered Protocols
Markus Ferringer, Vienna University of Technology, Austria
|
|
A
Concept of a Trust Management Architecture to Increase the Robustness
of Nano Age Devices
Thilo Pionteck, University of Lübeck; Werner Brockmann,
University of Osnabrück; Germany
|
|
Workshop
Wrap-Up
All!
|
|
17:30 |
Adjourn |
|
