Fault-Tolerant Systems Research Group, Technical University of Valencia (UPVLC), Spain.


The Technical University of Valencia, founded in 1973, is a public institution devoted to higher education, and to research and development (R&D) activities. The main scientific and technological domains are information and communication technologies, electric, electronic, mechanical and chemical engineering, civil engineering, architecture, food and agricultural technologies, business sciences and fine arts. At the end of 1996-97 term, the UPV academic community included over 33,000 pre-graduate students for 66 different careers, 1033 doctoral students, 1,775 teaching staff, 827 administrative and support staff members. UPV budget for 1999 was over 26,800 MPTA (161 MECU).


The UPVLC runs its R&D policy towards two aims: On one side, as a young university, the UPV needs to foster strategic and pre-competitive R&D to strengthen its basic knowledge base. For such purpose, it moves its research groups towards the major European research priorities, specially within the European R&D Programmes. On the other hand, it has a special vocation to perform R&D of interest to our industrial environment, looking after being a technological and R&D partner to companies settled in this region. In this sense, through technology transfer, the UPV gets closer the market's technology demands and obtains funding for further own R&D activities.


The GSTF was created in 1985 in the frame of a Spanish government project "Optimisation of a variable timing gear with electronic control using a microprocessor in order to improve the performance of the engine", CAYCIT PR83-3228, 1984-1987. The work carried out by the group in this project was referenced in the article “Fault Tolerance in Europe, in IEEE MICRO, 1989. Now it is one of the 4 research groups integrated within the Department of Computer Engineering (DISCA) of the Technical University of Valencia (UPVLC), in Spain. Research Topics of the DISCA are Fault–Tolerant Systems, Parallel Computers, Vision Systems and Real Time Systems. The research topics of the GSTF group are:


The GSTF is composed of 7 doctors (two more people will finish their thesis before the end of 1999), and 14 doctorate students. The group director is Juan-José Serrano, and Pedro Gil and Rafael Ors are co-directors. In the last years the group has participated in the following research projects:

Related to the current proposal, it is worth noting that the GSTF group has developed several fault injection tools in order to validate the dependability of fault tolerant systems. These tools are AFIT, a high-speed pin level fault injector, SOFI, a software implemented fault injection tool, and a semiautomatic tool for fault injection into VHDL simulation models.


Relevant publications:


R. J. Martínez, P. J. Gil, G. Martín, C. Pérez, J.J. Serrano, “Experimental Validation of High-Speed Fault-Tolerant Systems Using Physical Fault Injection”, in Proc. IFIP 7th Working Conf. on Dependable Computing in Critical Applications (DCCA-7), San Jose, CA, USA, pp. 233-249, 1999 (IEEE CS Press).
J. C. Campelo, P. Yuste, F. Rodríguez, P. J. Gil, J. J. Serrano, “Dependability evaluation of fault tolerant distributed industrial control systems”, in Proc. 1999 International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS 1999). San Juan, Puerto Rico, pp. 384-389, April. 1999. Lecture Notes in Computer Science, 1586. (Springer Verlag).
J. C. Campelo, P. Yuste, F. Rodríguez, P. J. Gil, J. J. Serrano, “Hierarchical Reliability and Safety Models of Fault Tolerant Distributed Industrial Control Systems”, accepted for its publication in 18th International Conference on Computer Safety, Reliability and Security (SAFECOM’99). Toulouse (France), September 1999. Lecture Notes in Computer Science, 1698, pp. 202-215. (Springer Verlag).
D. Gil, R. Martínez, J. C. Baraza, J. V. Busquets, P. J. Gil, “Fault injection into VHDL models: Experimental Validation of a Fault Tolerant Microcomputer system”, accepted for its publication in Third European Dependable Computing Conference (EDCC-3). Prague, Czech Republic, September 1999. Lecture Notes in Computer Science,1667; ISBN: 3-540-66483-1, pp. 191-208 (Springer Verlag).
D. Gil, J. Gracia, J. C. Baraza, P. J. Gil, “A study of the effects of transient fault injection into the VHDL model of a fault tolerant microcomputer system”, accepted for publication in the 6th IEEE International On-Line Testing Workshop, Palma de Mallorca, Spain, July 2000.


CVs of Key persons to be involved


Pedro Gil Vicente is professor of the Department of Computer Engineering (DISCA) at the Technical University of Valencia. Professor Gil teaches courses in Digital Design, Computer Networks and Fault Tolerant Systems. He is a vice-dean of the Computer Engineering Faculty of the UPV. He is co-director of the Fault-Tolerant Systems research Group (GSTF), within the DISCA. His research interests include design and implementation of real-time fault tolerant distributed systems, validation of fault tolerant systems by fault injection and digital systems design and implementation. He has authored or co-authored more than forty research papers of these subjects. He has also served as Program Committee member of the 6th IEEE International Workshop on Future trends of Distributed Computing Systems (FTDCS’97), and as reviewer of several Fault Tolerant Computing Symposia (FTCS), and other congresses related to computer performance and dependability. He was Invited Professor at the LAAS-CNRS, in Toulouse (France) during 3 months in 1996.


Juan-José Serrano Martín is professor of the Department of Computer Engineering (DISCA) at the Technical University of Valencia. He obtained the M.S. degree on Electrical and Electronic Engineering and the Ph.D. degree on Computer Engineering from the Technical University of Valencia in 1980 and 1986 respectively. Professor J. Serrano teaches courses in Microprocessor-based Systems, Performance Evaluation, Industrial Computer Networks and Fault Tolerant Systems. He is director of the Fault-Tolerant Systems research Group (GSTF), within the DISCA. His research interests include the design and implementation of real-time fault tolerant systems and the analysis and validation of fault tolerant systems. He has authored or co-authored more than fifty research papers of these subjects, and is reviewer of the IEEE Transactions on Reliability magazine. He was Visiting Associate Professor at the Centre for Reliable & High Performance Computing, in Urbana (IL), USA, during 11 months in 1988/89.